this post was submitted on 12 Jul 2024
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[–] [email protected] 134 points 4 months ago* (last edited 4 months ago) (1 children)

He doesn't list what the mistakes will be. He said that he fears that because hardware people aren't software people, that they will make the same mistakes that x86 made, which were then made by Arm later.

He did mention that fixing those mistakes was faster for Arm than x86, so that brings hope that fixing the mistakes on Risc V will take less time

[–] [email protected] 27 points 4 months ago* (last edited 4 months ago) (2 children)

I think it was something with instruction sets? Pretty sure i read something about this months ago.

[–] [email protected] 6 points 4 months ago (2 children)

No, it was about the prediction engines that contain security vulnerabilities. Problem is that software has no control over that, because hardware does future predictions for performance optimization.

[–] [email protected] 1 points 4 months ago

Prediction is a hard problem when coupled with caches. It relatively easy to say that no speculative instruction has any effect until it's confirmed taken if you ignore caches. However caches need to fetch information from memory to allow an instruction to evaluate, and rewinding a cache to it's previous state on a mispredict is almost impossible. Especially when you consider that the amount of time you're executing non-speculative code on a modern processor is very low.

Not having predictions is consigning yourself to 1990s performance, with faster clocks.

[–] [email protected] 1 points 4 months ago

Aah, right, that.

[–] [email protected] 4 points 4 months ago

I mean, that's all chip architectures are, so yes.